Logic gate

A argumentation aboideau is an arcadian or concrete accessory implementing a Boolean function, that is, it performs a analytic operation on one or added argumentation inputs and produces a distinct argumentation output. Depending on the context, the appellation may accredit to an ideal argumentation gate, one that has for instance aught acceleration time and absolute fan-out, or it may accredit to a non-ideal concrete device.1 (see Ideal and absolute op-amps for comparison

)

Logic gates are primarily implemented application diodes or transistors acting as cyberbanking switches, but can additionally be complete application electromagnetic relays (relay logic), abounding logic, aeriform logic, optics, molecules, or alike automated elements. With amplification, argumentation gates can be cascaded in the aforementioned way that Boolean functions can be composed, acceptance the architecture of a concrete archetypal of all of Boolean logic, and therefore, all of the algorithms and mathematics that can be declared with Boolean logic.

Background

The simplest anatomy of cyberbanking argumentation is diode logic. This allows AND and OR gates to be built, but not inverters, and so is an abridged anatomy of logic. Further, after some affectionate of addition it is not accessible to accept such basal argumentation operations cascaded as appropriate for added circuitous argumentation functions. To body a functionally complete argumentation system, relays, valves (vacuum tubes), or transistors can be used. The simplest ancestors of argumentation gates application bipolar transistors is alleged resistor-transistor argumentation (RTL). Unlike diode argumentation gates, RTL gates can be cascaded indefinitely to aftermath added circuitous argumentation functions. These gates were acclimated in aboriginal dent circuits. For college speed, the resistors acclimated in RTL were replaced by diodes, arch to diode-transistor argumentation (DTL). Transistor-transistor argumentation (TTL) again supplanted DTL with the ascertainment that one transistor could do the job of two diodes alike added quickly, application alone bisected the space. In around every blazon of abreast dent accomplishing of agenda systems, the bipolar transistors accept been replaced by commutual field-effect transistors (MOSFETs) to abate admeasurement and ability burning still further, thereby consistent in commutual metal–oxide–semiconductor (CMOS) logic.

For small-scale logic, designers now use prefabricated argumentation gates from families of accessories such as the TTL 7400 alternation by Texas Instruments and the CMOS 4000 alternation by RCA, and their added contempo descendants. Increasingly, these fixed-function argumentation gates are actuality replaced by programmable argumentation devices, which acquiesce designers to backpack a ample cardinal of alloyed argumentation gates into a distinct dent circuit. The field-programmable attributes of programmable argumentation accessories such as FPGAs has removed the 'hard' acreage of hardware; it is now accessible to change the argumentation architecture of a accouterments arrangement by reprogramming some of its components, appropriately acceptance the appearance or action of a accouterments accomplishing of a argumentation arrangement to be changed.

Electronic argumentation gates alter decidedly from their relay-and-switch equivalents. They are abundant faster, absorb abundant beneath power, and are abundant abate (all by a agency of a actor or added in best cases). Also, there is a axiological structural difference. The about-face ambit creates a affiliated brownish aisle for accepted to breeze (in either direction) amid its ascribe and its output. The semiconductor argumentation gate, on the added hand, acts as a high-gain voltage amplifier, which sinks a tiny accepted at its ascribe and produces a low-impedance voltage at its output. It is not accessible for accepted to breeze amid the achievement and the ascribe of a semiconductor argumentation gate.

Another important advantage of affiliated dent ambit argumentation families, such as the 7400 and 4000 families, is that they can be cascaded. This agency that the achievement of one aboideau can be active to the inputs of one or several added gates, and so on. Systems with capricious degrees of complication can be congenital after abundant affair of the artist for the centralized apparatus of the gates, provided the limitations of anniversary dent ambit are considered.

The achievement of one aboideau can alone drive a bound cardinal of inputs to added gates, a cardinal alleged the 'fanout limit'. Also, there is consistently a delay, alleged the 'propagation delay', from a change in ascribe of a aboideau to the agnate change in its output. Back gates are cascaded, the absolute advancement adjournment is about the sum of the alone delays, an aftereffect which can become a botheration in accelerated circuits. Additional adjournment can be acquired back a ample cardinal of inputs are affiliated to an output, due to the broadcast capacitance of all the inputs and base and the bound bulk of accepted that anniversary achievement can provide.

Symbols

There are two sets of symbols for elementary argumentation gates in accepted use, both authentic in ANSI/IEEE Std 91-1984 and its supplement ANSI/IEEE Std 91a-1991. The "distinctive shape" set, based on acceptable schematics, is acclimated for simple drawings, and derives from MIL-STD-806 of the 1950s and 1960s. It is sometimes unofficially declared as "military", absorption its origin. The "rectangular shape" set, based on IEC 60617-12 and added aboriginal industry standards, has ellipsoidal outlines for all types of gate, and allows representation of a abundant added ambit of accessories than is accessible with the acceptable symbols. The IEC's arrangement has been adopted by added standards, such as EN 60617-12:1999 in Europe and BS EN 60617-12:1999 in the United Kingdom.

The ambition of IEEE Std 91-1984 was to accommodate a compatible adjustment of anecdotic the circuitous argumentation functions of agenda circuits with schematic symbols. These functions were added circuitous than simple AND and OR gates. They could be average calibration circuits such as a 4-bit adverse to a ample calibration ambit such as a microprocessor. IEC 617-12 and its almsman IEC 60617-12 do not absolutely appearance the "distinctive shape" symbols, but do not prohibit them. 1 These are, however, apparent in ANSI/IEEE 91 (and 91a) with this note: "The distinctive-shape attribute is, according to IEC Publication 617, Part 12, not preferred, but is not advised to be in bucking to that standard." This accommodation was accomplished amid the corresponding IEEE and IEC alive groups to admittance the IEEE and IEC standards to be in alternate acquiescence with one another.

Universal logic gates

Charles Sanders Peirce (winter of 1880–81) showed that NOR gates abandoned (or alternatively NAND gates alone) can be acclimated to carbon the functions of all the added argumentation gates, but his assignment on it was abstruse until 1933.2 The aboriginal appear affidavit was by Henry M. Sheffer in 1913, so the NAND analytic operation is sometimes alleged Sheffer stroke; the analytic NOR is sometimes alleged Peirce's arrow.3 Consequently, these gates are sometimes alleged accepted argumentation gates.4

De Morgan equivalent symbols

By use of De Morgan's theorem, an AND action is identical to an OR action with negated inputs and outputs. Likewise, an OR action is identical to an AND action with negated inputs and outputs. Similarly, a NAND aboideau is agnate to an OR aboideau with negated inputs, and a NOR aboideau is agnate to an AND aboideau with negated inputs.

This leads to an another set of symbols for basal gates that use the adverse amount attribute (AND or OR) but with the inputs and outputs negated or inverted. Use of these another symbols can accomplish argumentation ambit diagrams abundant clearer and advice to appearance adventitious affiliation of an alive aerial achievement to an alive low ascribe or vice-versa. Any affiliation that has argumentation negations at both ends can be replaced by a negationless affiliation and a acceptable change of aboideau or vice-versa. Any affiliation that has a antithesis at one end and no antithesis at the added can be fabricated easier to adapt by instead application the De Morgan agnate attribute at either of the two ends. When antithesis or polarity indicators on both ends of a affiliation match, there is no argumentation antithesis in that aisle (effectively, bubbles "cancel"), authoritative it easier to chase argumentation states from one attribute to the next. This is frequently apparent in absolute argumentation diagrams - appropriately the clairvoyant charge not get into the addiction of advertence the shapes alone as OR or AND shapes, but additionally booty into annual the bubbles at both inputs and outputs in adjustment to actuate the "true" argumentation action indicated.

All argumentation relations can be accomplished by application NAND gates (this can additionally be done application NOR gates). De Morgan's assumption is best frequently acclimated to transform all argumentation gates to NAND gates or NOR gates. This is done mainly back it is accessible to shop for argumentation gates in aggregate and because abounding electronics labs banal alone NAND and NOR gates.

Data storage

Logic gates can additionally be acclimated to abundance data. A accumulator aspect can be complete by abutting several gates in a "latch" circuit. More complicated designs that use alarm signals and that change alone on a ascent or falling bend of the alarm are alleged edge-triggered "flip-flops". The aggregate of assorted flip-flops in parallel, to abundance a multiple-bit value, is accepted as a register. When appliance any of these aboideau setups the all-embracing arrangement has memory; it is again alleged a consecutive argumentation arrangement back its achievement can be afflicted by its antecedent state(s).

These argumentation circuits are accepted as computer memory. They alter in performance, based on factors of speed, complexity, and believability of storage, and abounding altered types of designs are acclimated based on the application.

Implementations

Since the 1990s, best argumentation gates are fabricated of CMOS transistors (i.e. NMOS and PMOS transistors are used). Often millions of argumentation gates are packaged in a distinct chip circuit.

There are several argumentation families with altered characteristics (power consumption, speed, cost, size) such as: RDL (resistor-diode logic), RTL (resistor-transistor logic), DTL (diode-transistor logic), TTL (transistor-transistor logic) and CMOS (complementary metal oxide semiconductor). There are additionally sub-variants, e.g. accepted CMOS argumentation vs. avant-garde types application still CMOS technology, but with some optimizations for alienated accident of acceleration due to slower PMOS transistors.

Non-electronic implementations are varied, admitting few of them are acclimated in applied applications. Many aboriginal electromechanical agenda computers, such as the Harvard Mark I, were congenital from broadcast argumentation gates, application electro-mechanical relays. Argumentation gates can be fabricated application aeriform devices, such as the Sorteberg broadcast or automated argumentation gates, including on a atomic scale.7 Argumentation gates accept been fabricated out of DNA (see DNA nanotechnology)8 and acclimated to actualize a computer alleged MAYA (see MAYA II). Argumentation gates can be fabricated from breakthrough automated furnishings (though breakthrough accretion usually diverges from boolean design). Photonic argumentation gates use non-linear optical effects